Have a rich feature set that includes multiple high bandwidth ports, low-latency, hybrid buffers, queuing, scheduling, congestion management, and industry-leading NPL-based NPU
Students passing out in 2023 and Pursuing Bachelor / Master degree in Electronics Engineering /Micro Electronics/VLSI.
Ability to manage multiple tasks and work toward long-term goals.
Solid understanding of engineering fundamentals and technical problem-solving skills.
Experience in establishing and sustaining strong relationships with the extended team.
Excellent communication skills (verbal and written).
Knowledge in Hardware design, the test/verification environment is designed using an object-oriented framework designed using UVM so you will use knowledge from your programming courses that include advanced data structures, algorithms, and design patterns as well as languages such as SystemVerilog HDL / C / C++ / Python.